The present invention relates in general to testing an integrated circuit (IC) or processor chip using the system board for a PC or a workstation and an Automatic Test Equipment (ATE) tester.
ICs and in particular processor ICs are produced in very high volume. Many processors have a maximum operating frequency as one of the key parameters for assessing the processor""s performance and therefore its price point. Processors, which are manufactured in a complementary metal oxide silicon (CMOS) topology, have a maximum operating frequency that is dependent on power supply voltage, operating temperature, packaging method and the system environment in which it is used. Most processor ICs are specified with a maximum operating frequency at a maximum operating temperature and a minimum power supply voltage. Of course users of the processors expect that the performance is guaranteed in a system environment comprising a system mother board, system power supply and corresponding operating environment with its noise levels and other system variables. Automatic Test Equipment (ATE) systems are manufactured to aid the IC vendors in testing large numbers of ICs. These ATE systems are characterized by their ability to be adjusted for a variety of ICs, thus they have the ability to vary parameters important to an IC""s operation. These ATE systems, however, do not replicate a system operation environment and in fact may produce a more ideal environment, for example lower noise, better clock signals, and better power supply regulation. These ATE systems, however, are designed to test a high volume of ICs and to provide flexibility in programming test variables. Because of this there is a need for a method that allows ATE test system variables to be set that will correlate closely with corresponding desired system operation limits so high volume testing will allow ICs to be more accurately sorted into system operation classes.
Test data is acquired on a set of ICs using both an ATE test system and a system test motherboard. The data acquired on the ATE is different from the data acquired on the system test motherboard. Three key parameters, operating frequency, operating temperature, and operating power supply voltage, are used to create sets of parametric data for each IC in a sampled set of ICs. During a test only one parameter is varied and the other two are held fixed; the variable parameter is adjusted until the IC fails. Multiple two parameter graphs of the parametric data for the sample set of ICs are plotted using one parameter from the ATE tester and another from the system test motherboard. The slope or numerical derivative is calculated to generate conversion factors. During a manufacturing cycle, all the production ICs are tested on the ATE tester as part of the production test to determine a single operational parameter limit with the two other parameters held fixed. The conversion factors are then used to normalize the production test data enabling the production ICs to be sorted into different operational classes or bins. These operating classes may be at a different frequency, temperature and voltage from the test points used in the actual ATE production tests.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.